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primarysourced Photonics sector POET
POET
~3 min read · 594 words ·updated 2026-04-29 · confidence 50%

02 — Technology

Section role

This section answers what does POET actually build, and where is the silicon-photonics platform heading. It traces the Optical Interposer architecture (passive Si waveguide layer + flip-chip bonded III-V actives + CMOS-compatible packaging), maps it against the 800G / 1.6T / 3.2T transceiver generations, indexes the patent and conference output, and documents the foundry / acquisition history that shaped the current operating model.

POET is a fabless platform-IP company: it owns the Optical Interposer process recipe and design, but contracts wafer fab to a Malaysian silicon foundry (SilTerra) and contracts back-end assembly + test to Globetronics (Penang) and NationGate (also Malaysia), plus the legacy SPX (Super Photonics Xiamen) facility now wholly owned. Lasers come from external III-V suppliers (Mitsubishi Electric, Almae Technologies / Accelink, Sivers Semiconductors), and DSP / analog from external partners (Semtech FiberEdge for receivers; previously Marvell-Celestial AI for transmit on cancelled engagements).

What’s here

  • Platform overview — the Optical Interposer architecture: passive silicon waveguide layer, flip-chip bonded actives, CMOS-compatible packaging. Comparison vs. monolithic SiPh, vs. discrete TOSA/ROSA, vs. TFLN, vs. EO-polymer. Structural strengths and weaknesses.
  • Optical interconnect roadmap — POET’s product roadmap mapped against the 800G CWDM8 / PSM8 / FR4 / DR8, 1.6T 2xFR4 / DR8 / 8xDR1, and 3.2T CPO generations. Cross-reference to OIF / IEEE 802.3 standards and pluggable form factors (QSFP-DD, OSFP, OSFP-XD, CPO).
  • Products — current product portfolio: optical engines (transmit, receive, transceiver), engine variants by data rate, the POET Infinity and POET Teralight families.
  • Patents — IP landscape with an aggregator-vs-distinct-invention methodology section, foundational claims on hybrid integration, and a forward audit task list.
  • Papers and conferences — Academic and conference output by POET technical leadership (Dr. Suresh Venkatesan, Raju Kankipati, technical staff). OFC, ECOC, IPC, SPIE Photonics West.
  • Foundry relationships — SilTerra Malaysia (silicon-foundry partner for the Interposer wafer), Globetronics + NationGate (Malaysian back-end assembly/test), Super Photonics Xiamen (now wholly owned, post-Sanan exit). Historical foundry exposure (DenseLight, GlobalFoundries lineage of CEO Suresh Venkatesan).
  • DenseLight acquisition — Corporate history: 2016 acquisition of Singapore-based laser foundry DenseLight Semiconductors, divested 2019 for $26M to a Chinese consortium. Why this matters for the IP-and-supply lineage.

Reading order

Discipline reminder

Technology claims age fast and POET communicates heavily via press release and shareholder-update letters, which can selectively emphasize wins. Every roadmap data point should resolve to either (a) a POET technical paper at a peer-reviewed venue, (b) an OFC / ECOC / IPC / SPIE program-page entry, (c) a customer co-disclosure, or (d) an explicit confidence flag. Patent counts must be regenerated from USPTO / Google Patents at refresh; never inherit a stale number. The April 2026 Marvell-Celestial AI purchase-order cancellation is a reminder that disclosed engagements can reverse — always cite the most recent primary-source update.

Cross-section pointers

Confidence legend

  • ✓ — verified via primary source (SEC filing, POET press release, peer-reviewed paper)
  • ◐ — partial / aggregator-derived / secondary citation
  • ⚠ — inferred or estimate (no primary source available; flagged for follow-up audit)