POET Technologies — supply chain map

Updated: 2026-04-29 Status: ✓ Verified via primary-source POET releases. Hyperscaler-end-customer inferences flagged ⚠. Cross-references: Customers · Partners · foundry relationships · platform overview

1. Supply-chain summary

POET is a fabless platform-IP company sitting in the middle of a multi-stage photonic-electronic value chain. Inputs are III-V epi wafers, CMOS ICs, and 8-inch silicon Interposer wafers; outputs are chip-scale optical engines that ship into transceiver modules and CPO substrates.

The supply chain has three concentration points (each with its own risk):

III-V epi capacity for 200G/lane EMLs — industry-tight through 2026; mitigated for POET via multi-supplier sourcing (Mitsubishi, Almae, Sivers)
Silicon-foundry capacity at SilTerra — single-source for the Optical Interposer wafer; SilTerra operating well below leading-edge SiPh-foundry queue depths but still a single point
Back-end assembly + test capacity — multi-source via Globetronics + NationGate + SPX, but flip-chip alignment yields are a structural drag at any of them

POET reaches end-market indirectly through transceiver-module makers (Mentech, Lessengers, FIT, Luxshare, et al.) and through CPO substrate integrators (notional Marvell-Celestial post-cancellation; potential future Broadcom / Cisco / NVIDIA scenarios).

2. Stage-by-stage value chain

Stage 1: III-V epi and laser-chip suppliers (upstream)

Inputs to POET stack:

Mitsubishi Electric (Japan) — 400G / 200G EMLs ✓ active POET partner per June 2024 FAQ
Almae Technologies (France, Accelink-affiliated) — InP epi wafers + foundry services ✓ active per 2018 collaboration, continuing per ⚠ presumption
Sivers Semiconductors (Sweden) — DFB lasers for ELS ✓ active per 2025-09-29 collaboration
Quantum Computing Inc (US) — TFLN modulators (3.2T) ✓ active per 2025-11-11 collaboration
Other suppliers (Sumitomo Electric, NEL, Lumentum-when-not-competing) — historical / situational ⚠

Stage 1 risks:

Capacity scarcity of 200G/lane InP EMLs — explicitly called out by POET in the 1.6T 2xFR4 blog post (“a dramatic capacity increase of Indium Phosphide-based EML lasers at a time when the industry is facing shortages”)
Geopolitical exposure — Almae’s Accelink-affiliation creates indirect China sourcing alongside Sivers (Sweden) and Mitsubishi (Japan); diversification mitigates
TFLN supply maturity — QCi-class TFLN supply is pilot-scale and unproven at production volume

Stage 2: Silicon-foundry (Optical Interposer wafer)

SilTerra Sdn Bhd (Malaysia) — 8-inch silicon foundry, custom POET waveguide module since 2018-04-09 ✓
Process capability: Standard 8-inch fabrication infrastructure with custom waveguide module added per POET-SilTerra release
Geographic anchor: Malaysia → “China Plus One”
IP arrangement: POET retains design IP; SilTerra retains process IP

Stage 2 risks:

Single-source silicon foundry — no second-source SilTerra in current architecture ⚠
SilTerra ownership uncertainty — Khazanah → DNeX transition; current ownership status not separately verified ⚠
Capacity sufficiency — SilTerra is a smaller specialty foundry, not a leading-edge mega-fab; capacity scaling beyond ~1M-engines/year throughput is a forward question ⚠

Stage 3: POET design and flip-chip integration

POET (Toronto HQ + Singapore subsidiary) — owns the Optical Interposer design IP, the flip-chip recipe, and the engine product specifications
R&D headcount and capability — small-team, focused; specifics not enumerated in this audit ⚠
Design control: POET defines the engine designs exclusively; partners do not modify

Stage 3 risks:

Small-team execution risk — typical for small-cap platform-IP companies
IP litigation exposure — no current litigation but freedom-to-operate analysis incomplete ⚠

Stage 4: Back-end assembly + test (BE-A&T)

Three facilities, all with capacity allocation per the 1M+ engines/year aggregate target:

Globetronics Manufacturing Sdn Bhd (Penang, Malaysia) — primary BE per 2024-12-23 agreement ✓
NationGate Solutions (Malaysia) — second-source per 2025-06-24 agreement ✓
Super Photonics Xiamen (SPX, Xiamen, China) — wholly owned per 2024-12-31 acquisition ✓

Stage 4 risks:

Flip-chip yield drag — non-zero yield loss per bond compounds with 14-component-class engines
Geographic split — Malaysia (primary) + China (legacy SPX) creates some operational complexity but provides geopolitical hedging

Stage 5: Engine sale to module-maker / CPO integrator

Mentech Technology (China) — 800G + 1.6T modules ✓
Lessengers (Korea) — 800G + 1.6T 2×DR4 modules ✓
Foxconn Interconnect Technology (FIT) — module / design partner ◐ NDA
Luxshare — module manufacturer ◐ NDA
Two unnamed Q3 2025 customers ($5.6M total) ◐
Unnamed 2025-10-22 customer ($5.0M order) ◐
Marvell / Celestial AI — ⚠ CANCELLED 2026-04-23 (CPO architecture)

Stage 5 risks:

Customer concentration — small number of disclosed engagements; the Marvell cancellation removed a high-profile design slot
NDA framing limits public visibility — the actual revenue mix may be different from the press-release-driven picture

Stage 6: Module-maker assembles and ships transceiver

Module-makers package POET engines into pluggable transceivers (QSFP-DD, OSFP, OSFP-XD) or onto CPO substrates
Module-makers add the surrounding plastic / metal housing, the host PCB, optical fiber connector, and integrate with a DSP (Marvell, Broadcom, MaxLinear, Credo, etc. — depending on customer choice)
Transceiver shipped to switch-OEM, server-OEM, or hyperscaler-direct procurement

Stage 7: Hyperscaler / AI-cluster end customer

POET reaches end-market indirectly:

NVIDIA Cloud / NVIDIA AI clusters — primary 800G/1.6T transceiver-demand pull through 2026–2027 ⚠ POET indirect
AWS / Microsoft Azure / Google Cloud / Meta / Oracle OCI — multi-Tb/s rack interconnect ⚠ POET indirect
Chinese hyperscalers (Alibaba, Tencent, Baidu, ByteDance) — addressed via SPX + Mentech-class Chinese module-makers ⚠ POET indirect, geopolitically sensitive

⚠ No POET engine has been publicly confirmed as deployed at a specific named hyperscaler as of 2026-04-29. The relationship is structurally indirect: hyperscaler buys transceiver from module-maker; module-maker bought engine from POET.

3. Choke points and mitigations

Choke point	Risk level	Mitigation status	Notes
200G/lane InP EML capacity	HIGH	Multi-source (Mitsubishi, Almae, Sivers)	Industry-wide tight through 2026
TFLN modulator supply at production volume	HIGH	Single-source via QCi	Unproven supply chain; partner-funded development
SilTerra Si-foundry single-source	MEDIUM	None disclosed	Specialty foundry, not leading-edge megafab
Flip-chip yield	MEDIUM	Operational improvement; passive-alignment design	Compounds for high-component-count engines
Back-end capacity	LOW	Multi-source (Globetronics + NationGate + SPX)	1M+ engines/year aggregate target
Customer concentration	HIGH	Multi-customer pipeline post Marvell cancellation	NDA-protected engagements limit visibility
Geopolitical exposure (China)	MEDIUM	”China Plus One” — primary stack now Malaysia	SPX China retained for China-market
Standards-body influence	MEDIUM	Indirect via Semtech, Sivers, Mitsubishi participants	POET small-cap not direct voting member

4. Value-chain margin distribution (qualitative)

⚠ Quantitative per-stage margin breakdown is not publicly disclosed. Qualitative framing:

III-V suppliers: Capture ~30–50% of an optical engine’s BOM value (driven by InP wafer + EML chip cost) — high gross margin per chip, capacity-constrained
POET Interposer + integration: Captures roughly the engine ASP minus III-V + CMOS BOM — gross margin upside if scale is achieved (volume amortizes NRE), variable at low volumes
CMOS supplier (Semtech FiberEdge, drivers): Capture ~10–20% of engine BOM
Back-end (Globetronics, NationGate, SPX): Capture standard semiconductor-A&T fee — single-digit to low-teens of engine ASP
Module-maker: Captures the full transceiver ASP minus engine cost minus DSP cost minus housing; large absolute revenue but pressured margins as DSP ASPs are dominant
DSP supplier (Marvell, Broadcom, MaxLinear): Captures the most lucrative slice of the transceiver — 200G/lane PAM4 DSPs at $200–$1,000+ per piece
Switch ASIC vendor: Outside POET’s value chain
Hyperscaler: End customer; pays full transceiver ASP into networking infrastructure budget

POET’s value-chain position is between III-V suppliers and DSP suppliers — neither the most lucrative slice (DSP) nor the most capacity-constrained (III-V). The bull case is that POET’s IP-and-integration value-add scales the company toward mid-double-digit gross margins as volume passes through; the bear case is that the integration layer gets squeezed between III-V capacity costs going up and module-maker pricing pressure pushing back.

5. Diagrammatic narrative

[III-V epi suppliers]                                         [CMOS IC suppliers]
  - Mitsubishi Electric (Japan)                                  - Semtech (TIA)
  - Almae Technologies (France/Accelink)                         - Driver IC suppliers ⚠
  - Sivers Semiconductors (Sweden)                               - DSP supplier (downstream — module-maker chooses)
  - Quantum Computing Inc (US, TFLN)
                       ↓                                                      ↓
                       ↓-------------------> [POET Optical Interposer fab @ SilTerra Malaysia] -----↓
                                                          ↓
                                          [POET design + flip-chip integration]
                                                          ↓
                                          [BE-A&T: Globetronics + NationGate + SPX]
                                                          ↓
                                            [POET optical engine — finished product]
                                                          ↓
        [Module-maker / CPO integrator]
        - Mentech (China) ✓
        - Lessengers (Korea) ✓
        - Foxconn Interconnect Technology ◐
        - Luxshare ◐
        - (Marvell-Celestial AI ⚠ cancelled)
                       ↓
        [Transceiver / CPO substrate to hyperscaler]
        - NVIDIA AI cluster ⚠
        - AWS / Azure / Google / Meta / Oracle ⚠
        - Chinese hyperscalers ⚠

⚠ All hyperscaler-end-customer associations are structural inferences; POET does not publicly confirm which hyperscalers receive transceivers containing POET engines.

6. Forward audit task list

Quantify per-stage margin distribution when POET financials provide more revenue mix detail ⚠
Identify SilTerra ownership (Khazanah → DNeX → ?) ⚠
Track FIT and Luxshare for any disclosed hyperscaler attachment ⚠
Replace the Marvell-Celestial AI gap via new disclosed customer engagements ⚠
Map POET-engine-inside transceivers to specific hyperscaler-deployed modules as design wins are publicized ⚠

7. Cross-references

Customers — disclosed engagements detail
Partners — supplier-by-supplier detail
foundry relationships — manufacturing-stack source detail
platform overview — architectural underpinning
overview — revenue translation