POET Technologies — patent landscape

Consolidated patent landscape for POET Technologies Inc. (CIK 0001437424). Built from POET’s own self-disclosed counts (FY2024 MD&A, accession 0001493152-24-046299), supplemented by Justia Patents and uspto.report aggregator queries (2026-04-29). The methodology mirrors the MRVL patents and LWLG ip patents approach: aggregator-count first, then inflation-factor adjusted, then forward-audit task list.

Confidence legend: ✓ verified primary (POET disclosure or USPTO record fetched directly) · ◐ aggregator-derived or secondary citation · ⚠ inferred or unverified.

Companion files: Platform overview · Papers and conferences · DenseLight acquisition · Foundry relationships.

1. Headline numbers

1.1 POET self-disclosed (MD&A)

Per POET’s MD&A filed concurrently with the FY2024 financials (and re-confirmed in the FY2024 20-F), POET disclosed a portfolio of:

72 issued patents worldwide ✓
27 pending patent applications, including three provisional applications ✓
Of the 72 issued, 33 are directly related to the Optical Interposer, including fundamental design and process patents
All 27 pending applications are Optical Interposer-related ✓

Source: POET FY2024 MD&A (accession 0001493152-24-046299) ✓

This is the primary-source anchor for the portfolio count. The 33-direct + 39-other split implies that a substantial part of POET’s issued portfolio predates the Optical Interposer and originates from earlier technology generations (the GaAs / III-V monolithic photonics work that POET pursued in the 2010s pre-Interposer pivot, plus the DenseLight Singapore IP that was acquired 2016 and partially divested 2019 — see DenseLight acquisition).

1.2 Aggregator counts (cross-check)

Aggregator queries on 2026-04-29:

Justia Patents assignee = “POET Technologies, Inc.” → returns multiple-page patent list ✓ (Justia)
uspto.report company = “Poet-Technologies-Inc” → patent filings list ✓ (uspto.report)
⚠ Specific result counts not separately enumerated in this audit; followup audit task is to pull exact counts and cross-reference against the MD&A 72/27 split.

The LWLG-validated 2.1×–3.5× aggregator-vs-distinct-invention inflation factor (per LWLG audit at ip patents §“Aggregator counts vs validated inventions”) suggests that for POET — a small-cap with focused multi-jurisdictional prosecution on a single platform — the inflation factor will be on the lower end of that band, perhaps 1.5×–2.5×. Applying this:

Estimated distinct inventions: 30–50 (vs. 72 issued patents disclosed) ⚠ Order-of-magnitude. POET’s MD&A figure is the documents-issued count and includes counterpart patents in EU, Japan, China, Korea jurisdictions; distinct inventions are fewer.

The 33 Optical-Interposer-direct patents likely cover ~15–25 distinct inventions on hybrid-integration architecture, waveguide-to-III-V coupling, AWG MUX/DMUX co-integration, flip-chip alignment, fiber-attach packaging, and process-flow IP. ⚠ Distinct-invention estimate; full audit deferred.

2. Patent-claim heatmap (POET self-classification)

POET’s own patent disclosure in the MD&A organizes the portfolio along four axes:

Device structures — the physical layout of the Interposer waveguide, modulator interface, photodiode interface, and laser-attach geometries
Underlying technology related to the Optical Interposer — the foundational hybrid-integration architecture
Applications of the technology — specific module/engine designs for datacom transceivers, sensor arrays, and other use cases
Fabrication processes — the SilTerra-co-developed process flow recipes (waveguide etch, planarization, flip-chip pad metallization, fiber-attach geometry)

✓ Per FY2024 MD&A

3. Foundational patent areas (claim-area inventory)

This section enumerates the foundational claim areas POET asserts via the Optical Interposer platform. Specific patent numbers and claim language are deferred to a follow-up USPTO audit.

3.1 Hybrid integration architecture

The core claim: a passive silicon waveguide layer with feature geometries optimized for flip-chip-bonded III-V active devices, including spot-size converters, RF transmission lines, and AWG MUX. ⚠ Specific patent numbers TBD by audit.

This is the most strategically important IP — it covers the concept of the Interposer as a chip-scale board-for-light. Competitors building hybrid SiPh + III-V engines (Lumentum + Cloud Light, Coherent’s hybrid platforms, GlobalFoundries Fotonix users, Tower PH18 users) potentially encounter overlap depending on the specific waveguide-and-flip-chip geometry claims. ⚠ Freedom-to-operate analysis not separately conducted.

3.2 Passive-alignment fiber attach

POET highlights “passive assembly of components” as a hallmark feature. The IP covering the fiducial mark geometry, mode-conversion structures, and fiber-array attachment process is foundational to the cycle-time advantage. ⚠ Specific patent numbers TBD.

3.3 Monolithic AWG MUX/DMUX co-integration

The arrayed-waveguide grating multiplexer is fabricated in the Si interposer waveguide layer rather than as a separate component. This IP eliminates a discrete MUX and reduces BOM and footprint. ⚠ Specific patent numbers TBD.

3.4 Flip-chip pad and bonding-process IP

The metallurgical / dimensional / process-flow IP for the flip-chip bond between the Interposer and the III-V chips. Critical for yield and reliability. ⚠ Specific patent numbers TBD.

3.5 EML-array configuration

POET’s 1.6T 2xFR4 blog post describes the EML-array configuration as “an industry first.” If the array geometry and optical-coupling architecture are protected by patent, this is differentiating IP at the 200 G/lane PAM4 generation. ⚠ Specific filings TBD.

3.6 Process IP (SilTerra co-developed)

Per the SilTerra partnership, the manufacturing-process recipe was co-developed with SilTerra Malaysia. IP ownership is structured per the partnership agreement — typically POET retains design-IP, SilTerra retains process-IP, with cross-licensing for production. ⚠ Exact split not publicly disclosed.

4. Inheritance from acquisitions

4.1 DenseLight Semiconductors (acquired 2016, divested 2019)

POET acquired Singapore-based DenseLight Semiconductors on 2016-05-11 for $26M ✓ (POET press release). DenseLight brought III-V (InP) epitaxy, wafer-fab, and assembly+test capability for super-luminescent diodes, lasers, and photonic integrated circuits.

POET divested DenseLight 2019-08-21 (announced) / 2019-11-08 (close target) for $26M to a Dynax-led Chinese consortium ✓ (Semiconductor Today 2019-08-21; 2019-10-29 closing update).

IP outcome: The DenseLight-priority III-V process and device IP transferred with the divestiture. POET retained licenses or know-how relevant to the Optical Interposer’s interface to III-V chips, but no longer owns the III-V epitaxy IP itself. ⚠ Specific surviving-license terms not publicly disclosed; audit deferred.

This is a net-negative for the patent portfolio narrative — POET shed III-V epitaxy IP at the 2019 divestiture and now sources III-V devices from third parties (Mitsubishi Electric, Almae/Accelink, Sivers Semiconductors). The Optical Interposer IP that POET retains is packaging and integration IP, not laser-physics IP. ✓

4.2 Super Photonics Xiamen (SPX, wholly acquired 2024-12-31)

POET acquired Sanan’s remaining 24.8% in SPX on 2024-12-31 to take 100% ownership ✓ (POET press release). SPX is primarily a back-end assembly+test facility, not an IP-rich entity. Assets transferred include production equipment per the concurrent equipment-purchase agreement.

IP outcome: Minimal incremental patent inventory; the value is operational (facility, equipment, trained staff in Xiamen) not patent-counted. ✓

5. Aggregator inflation factor — the LWLG calibration

The LWLG audit (per ip patents §“Aggregator counts vs validated inventions”) found:

22 distinct LWLG inventions validated against published USPTO records
Aggregator counts of 47–78 for the same portfolio (Justia, Google Patents, uspto.report)
Inflation ratio 2.1×–3.5× for a small portfolio with multi-jurisdictional prosecution

For POET, the structural factors are:

Smaller absolute portfolio (72 issued vs. LWLG’s similar order-of-magnitude) → similar small-cap dynamics
Fewer jurisdictions historically prosecuted (POET focuses on US, EU, China, Korea, Japan for datacom-relevant markets) → lower-end inflation factor
Continuation-and-divisional chain density per priority filing tends to be moderate (POET filings show moderate continuation activity in Justia browse) ⚠ visual inspection only

Estimated POET distinct inventions: 30–50 ⚠ vs. 72 patents disclosed. The 33 Optical-Interposer-direct patents likely correspond to 15–25 distinct inventions.

6. Patent activity over time (velocity proxy)

⚠ A formal patent-velocity time-series (filings per year, grants per year) is not yet built for POET. Suggested follow-up audit task:

Query Justia Patents and Google Patents with assignee=POET-Technologies, filter by application-date and publication-date
Build a year-by-year filings/grants chart 2016–2026
Cross-reference with corporate milestones (DenseLight acquisition, SilTerra partnership, Mentech engagement, Marvell-Celestial cancellation)
Confidence flag: ⚠ inferred until completed

The expected pattern: a peak in 2017–2019 from the DenseLight-era III-V work, a dip 2019–2020 during the divestiture and Interposer pivot, and a re-acceleration 2021–2025 as the Optical Interposer platform matured and customer engagements drove application filings on specific engine variants.

7. Litigation and encumbrance status

⚠ No publicly disclosed patent litigation involving POET as plaintiff or defendant as of 2026-04-29. The April 2026 Marvell-Celestial AI purchase-order cancellation cites “alleged disclosures of information related to the Purchase Order and shipping information in contravention of confidentiality obligations” — this is a contractual / confidentiality dispute, not a patent infringement claim. ✓

POET’s Singapore subsidiary structure (post-DenseLight divestiture) and the Toronto HQ structure imply IP holdings are likely consolidated at the Canadian parent level. ⚠ Holding-entity structure for IP not separately verified.

8. Forward audit task list

The following items are flagged for the next refresh / deeper audit:

Pull exact aggregator counts from Justia, Google Patents, and uspto.report on a stable date — record the count and the query URL for reproducibility ⚠
Identify the foundational Optical Interposer patent numbers (the 33 OI-direct grants per MD&A) — pull from USPTO Public PAIR by inventor (Suresh Venkatesan, technical staff) ⚠
Build patent-velocity time-series as described in §6 ⚠
Freedom-to-operate analysis vs. competitor platforms (Intel SiPh, Tower PH18, GF Fotonix 45SPCLO, HyperLight TFLN, Lumiphase) — flag any potential overlap on hybrid-integration claim language ⚠
DenseLight-priority IP audit — what survived the 2019 divestiture, what was licensed back to POET ⚠
Pull the FY2024 20-F (Item 4.B “Business Overview” and Item 11 “Quantitative Disclosures”) for any updated patent-count language post the MD&A snapshot ⚠

9. Cross-references

Platform overview — architecture mapped to claim areas
Papers and conferences — peer-reviewed companion to the patent record
DenseLight acquisition — IP heritage and divestiture impact
Foundry relationships — IP-ownership split with SilTerra