POET Risk Register — Seven Categories

This register codifies the structured-risk view that complements bear case (narrative form) and bull case (positive thesis). Each risk is identified by category prefix (T = Technical, C = Customer, F = Foundry/Supply, K = Capital, IP = Intellectual Property, X = Competitive, M = Market). Likelihood and Impact are scored 1-3 (1 = low, 2 = medium, 3 = high). The detection trigger field describes the public signal an analyst would observe if the risk were materializing. The mitigation field summarizes management’s commentary or structural defenses where applicable.

The register is calibrated against today’s date (2026-04-29), POET’s current operating posture (FY25 20-F filed 2026-03-31 accession 0001493152-26-014253, ~$430M cash end-2025 + $150M January 2026 raise = ~$580M starting-2026 liquidity, 30,000+ engine 2026 shipment commitment, ~$170M annualized burn rate at Q4 2025 run-rate), and a spot price of $8.03 (STOCK_PRICE_DATA.json, close 2026-04-28).

T — Technical risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
T1	Optical Interposer hybrid-integration yield gap at production volume. Hand-fabricated demonstration units have validated the architecture (200G/lane Tx/Rx engines, 1.6T receiver with Semtech). Production-grade yield at the 30,000+ engine 2026 commitment is unproven at SilTerra scale + III-V flip-chip + adiabatic coupling.	2	3	Q3 2026 / Q4 2026 6-K disclosures cite yield issues, capacity constraints, or first-shipment slips. Production order ASP softening or unit-volume reduction in the disclosed $5M order.	ECOC 2025 “Most Innovative” award (GlobeNewswire 2025-09-30 ✓) demonstrates hand-fab capability. Q4 2025 release: “decisive transition from development to execution” framing implies management confidence in the production-yield trajectory.
T2	III-V active integration thermal/reliability stability. Hybrid bonding of III-V actives onto Si waveguides has historically suffered from thermal-mismatch-driven reliability degradation in Telcordia GR-1221 + 85/85 humidity testing. POET’s Optical Interposer must clear hyperscaler-grade reliability for production module qualifications.	2	2	Customer-side qualification failures in 2H 2026 / 2027; module-OEM rework requests; warranty-reserve disclosures in FY26 20-F.	Sivers DFB laser collaboration leverages Sivers’ established reliability track record on InP/GaAs DFB lasers (Sivers PR ✓).
T3	1.6T / 3.2T product-cycle slippage. The Semtech 1.6T receiver and QCi 3.2T TFLN engine collaborations are at development stage; production timelines (1.6T into 2027, 3.2T into 2027-2028) require sustained R&D execution at current burn rates.	2	2	OFC 2027 (March 2027) demos delayed; module-OEM customer engagements at 1.6T migrate to monolithic SiPh competitors; 3.2T TFLN engagement with QCi loses momentum.	QCi TFLN collaboration (PRNewswire 2025-11 ✓) is structured to share NRE/IP between the parties; specialist partner ecosystems lower the in-house R&D burden.
T4	Light-source partnership delivery (Sivers DFB lasers, NTT Innovative Devices). Sivers and NTT collaborations are central to the post-DenseLight III-V active strategy. Either partnership unwinding or missing prototype/production milestones materially compresses POET’s product roadmap.	2	3	Sivers prototype slip beyond 1H 2026 deadline; NTT 2026 prototype + 2027 production targets pushed; partner press release silence > 2 quarters.	Sivers commitment is contractually framed (1H 2026 prototypes, end-2026 production Sivers PR ✓). NTT public disclosure (POET IR ✓).
T5	CPO architectural shift bypasses merchant-pluggable layer. Co-Packaged Optics technology is advancing rapidly (Tower SiPho/EIC announcement GlobeNewswire 2025-11-12 ✓; Marvell’s $3.25B Celestial AI acquisition closed Feb 2 2026 MRVL bull case Pillar 3). If hyperscalers move directly to CPO at 1.6T/3.2T, the merchant-pluggable-engine TAM compresses.	2	3	OFC 2027, OCP 2027 disclosures show hyperscaler CPO insertion at 1.6T+; pluggable-transceiver volume growth slows below LightCounting / Dell’Oro forecasts; module OEM CPO design wins (Innolight, Eoptolink, Coherent) drain pluggable-engine demand.	Sivers ELS for CPO collaboration (Sivers PR ✓) explicitly positions for CPO ELS (external light source) — a market POET can address even in a CPO-dominant architecture. QCi TFLN engine collaboration also positions for CPO.

C — Customer risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
C1	Single-customer concentration on the disclosed $5M production order. As of 2026-04-29 the only public production-order anchor is the October 2025 $5M+ order from “a leading systems integrator” (POET IR 2025-10-22 ✓). Cancellation or delay materially erodes the 30,000+ engine 2026 commitment.	2	3	Q1 2026 6-K (mid-May 2026 expected) lacks new production-order disclosure; delivery slip to 2H 2026 is missed; customer cancellation cited in any forward filing.	NDA-shielded customer base is industry-standard for transceiver-component vendors; multiple engagements are at NRE / spec-exchange stage per Q4 2025 management commentary.
C2	NDA-shielded customer base = unverifiable design-win count. POET discloses partner names (Sivers, NTT, Semtech, QCi) but not module-OEM customer names. External research cannot independently verify the engagement-pipeline distribution.	3	2	Forward 6-K disclosures continue to use “leading systems integrator” framing without naming any module-OEM customer; AGM 2026 commentary remains generic.	Industry-standard NDA practice; precedent: Marvell does not name custom-silicon hyperscaler customers either (MRVL exemplar ◐). The 2H 2026 first-shipment milestone forces customer disclosure indirectly through revenue concentration in the FY26 20-F.
C3	Hyperscaler customer-engagement gap (no Tier-1 hyperscaler named). None of the disclosed engagements as of 2026-04-29 are with named hyperscalers (AWS, Microsoft, Google, Meta). POET sells to module OEMs that ship to hyperscalers — one architectural layer removed from the bull-case demand source.	2	2	Q3 2026 / Q4 2026 6-Ks fail to disclose Tier-1 hyperscaler names or design wins; module OEM partners (Innolight, Eoptolink, etc.) move to monolithic SiPh suppliers at 1.6T+.	Layer-2 module-OEM positioning is structurally similar to Inphi-pre-Marvell; revenue ramp is gated by module-OEM win-rate at the hyperscaler customer level.
C4	Partner-relationship unwind (precedent: Sanan SPX 2024 buyout). The 2020 Sanan IC JV ended in a 2024 buyout of Sanan’s 24.8% interest for $6.5M payable over 5 years (GlobeNewswire 2024-12-31 ✓). The same pattern could repeat with Sivers, NTT, Semtech, or QCi if partner-side strategic priorities shift.	2	2	Press-release silence > 2 quarters from any of the named partners; partner-side 10-Q/equivalent disclosures de-emphasize POET collaboration; partner-CEO commentary shifts to alternative integration platforms.	Multi-partner stack reduces single-partner concentration; SilTerra foundry relationship has held since 2018 (8-year track record).
C5	Design-win cycle longer than capital-raise cycle. A typical hyperscaler-tier transceiver design-win cycle (NDA → spec → NRE → tape-out → qualification → production) runs 24-36 months. POET’s capital-raise cadence (~12-18 months between major take-downs per `data/edgar_recent.json` ✓) is shorter than the design-win cycle.	2	3	New F-3ASR / 424B5 / registered direct in 2H 2026 or 2027 before any named hyperscaler-tier customer is disclosed.	$580M starting-2026 cash (Q4 2025 + January 2026 raise) provides ~3.4 years of runway at $170M annualized burn — buys time for design-win cycle to close.

F — Foundry / Supply chain risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
F1	SilTerra capacity allocation risk. SilTerra Malaysia is the single silicon-photonic-interposer foundry per the 2018 master collaboration agreement (Semiconductor Digest 2018-04 ✓). Capacity allocation is contractually framed but has never been tested at the 30,000+ engine production volume.	2	3	Q1 2026 / Q2 2026 6-K disclosures cite SilTerra capacity bottlenecks; 2H 2026 first-shipment milestone slips; POET pursues qualification at a backup foundry (Tower, GlobalFoundries).	2018 MCA included consigned equipment + multi-year wafer purchase commitments. Historical relationship 8 years through 2026 without disclosed capacity disputes.
F2	III-V active supply (Sivers, NTT, third-party InP foundries) bottleneck. III-V actives (lasers, modulators, detectors) source from specialist InP foundries with global capacity constraints. Industry-wide InP foundry capacity is concentrated in 4-5 vendors (Lumentum, Coherent, Source Photonics, Sumitomo, Sivers).	2	2	Sivers Q1/Q2 2026 capacity-allocation disclosures; NTT supply-cycle disclosures; third-party InP industry capacity reports cite tightening.	Multi-vendor stack (Sivers, NTT, others under NDA) reduces single-vendor concentration. CPO ELS positioning broadens addressable supply chain.
F3	Sanan SPX (now 100% POET) operational continuity. Post-December 2024 100% ownership, SPX assumes full POET operating responsibility for production assembly + test. Geopolitical risk on China-domiciled production capacity is non-trivial given US-China export-control trajectory.	2	2	New BIS export-control rules adding silicon-photonic interposers or optical engines to the Commerce Control List; Entity-Listing of any POET China-domiciled subsidiary; sales-cycle friction with US/EU customers attributable to China-domiciled production.	$6.5M total Sanan minority buyout terms (GlobeNewswire 2024-12-31 ✓) suggest POET retains operational flexibility on production geography. Backup A&T capacity could be qualified outside China if needed.
F4	Tower / GlobalFoundries / TSMC SiPh foundry expansion compresses POET’s cost-structure advantage. Tower’s announced $300M SiPh capex expansion (GlobeNewswire 2025-11-12 ✓) plus GF Fotonix and TSMC SiPh capacity buildouts could erode POET’s cost advantage as monolithic SiPh wafer prices compress.	2	2	Public foundry-pricing disclosures show monolithic SiPh wafer-pricing dropping > 30% by 2027; transceiver-module-IC ASPs decline faster than POET’s BOM cost structure can absorb.	Hybrid-integration cost advantage is architectural (lower III-V-on-Si yield risk vs. monolithic), not just wafer-cost-driven. SilTerra 90nm 8” foundry has structural cost advantage vs. 12” advanced-node SiPh fabs.

K — Capital risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
K1	Continued dilution-funded operating model. Operating burn at Q4 2025 run-rate is ~$170M annualized. $580M starting-2026 cash funds approximately 3.4 years at current burn. Probability-weighted forward expectation: at least one new dilutive raise before end-2027.	3	2	F-3ASR shelf renewal in 2H 2026; 424B5 ATM take-down(s) in 2026-2027; registered direct offering at < $7.25 (the October 2025 raise price).	$580M cash buys time. Operating-burn rationalization possible (R&D efficiency program). 2H 2026 first-shipment revenue could slow burn growth.
K2	Warrant + option overhang fully-diluted dilution. 5.79M options + 37.36M warrants outstanding (per late-2025 secondary sources, ⚠ to be re-verified directly from FY25 20-F). Fully-diluted share count ~195.86M vs. basic ~152.7M = +28% additional dilution overhang.	3	2	Warrant-exercise notices in forward 6-Ks; FY25 20-F discloses warrant strike prices below current market; warrant-holder concentration disclosure.	Most warrants are likely tied to historical financings and have variable strike conditions. Cash inflow from exercise (~$200M+ if at-the-money) partially offsets burn-funded raise need.
K3	Auditor / going-concern risk at FY26 20-F filing. POET has historically maintained going-concern compliance with consistent auditor opinion. A change in opinion language at the FY26 20-F (target ~March 2027) would re-rate the equity to bear-case territory.	1	3	FY25 20-F (filed 2026-03-31, accession 0001493152-26-014253) audit opinion content; FY26 quarterly 6-K disclosures around audit-committee posture.	$580M starting-2026 cash > 3 years of runway, materially reducing going-concern probability.
K4	PFIC status compliance burden. POET historically has been classified as a Passive Foreign Investment Company (PFIC) for US tax purposes (POET 6-K PFIC disclosures ✓, see also FY25 20-F). PFIC status creates QEF/MTM elections complexity for US holders and can compress the US institutional investor base.	2	1	FY26 20-F PFIC determination; US redomicile track update (POET has signaled US-redomicile evaluation).	POET’s planned redomicile to the US would resolve PFIC status. Until redomicile, US investors can use QEF election to mitigate.

IP — Intellectual Property risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
IP1	Optical Interposer patent portfolio scope vs. Tower / GF / Intel SiPh prior art. POET holds an Optical Interposer patent portfolio dating back > 15 years. The breadth of claim coverage vs. monolithic SiPh prior art (Intel, GlobalFoundries, Tower IP) is unverified externally and could be challenged.	2	2	USPTO opposition / IPR / interference proceedings against POET key claims; FY26 20-F litigation footnote disclosures.	15+ years of patent prosecution history is substantial; multiple claim families across passive waveguide + III-V coupling + flip-chip integration.
IP2	License-in / license-out terms with SilTerra (foundry) and III-V partners. POET’s IP position depends on the contractual structure of the SilTerra MCA + III-V active partner license terms (Sivers, NTT, others). Unfavorable terms could compress monetization.	2	2	Q4 2026 / FY26 20-F litigation or contractual-renegotiation disclosures; SilTerra-side public statements on IP terms.	2018 MCA structure has held 8 years; multi-year wafer-purchase commitment is the typical contractual anchor.
IP3	TFLN modulator IP overhang at the 3.2T product cycle. The QCi TFLN modulator collaboration positions POET into the 3.2T window where TFLN IP holders (HyperLight, Coherent’s TFLN portfolio, Polariton/Marvell POH) have established positions.	1	2	TFLN-related litigation against POET / QCi; HyperLight or Polariton announces hyperscaler 3.2T design wins that exclude POET-integrated platforms.	QCi collaboration distributes TFLN IP burden to QCi; POET retains the integration-platform IP.
IP4	DenseLight residual IP terms post-2019 divestiture. The 2019 sale of DenseLight to a Chinese consortium for $26M (POET 2019-08-20 ✓) included “preferred supply and strategic cooperation” terms; the survival and scope of those terms post-2025 is not publicly disclosed.	1	1	Litigation footnote in FY26 20-F citing DenseLight successor entity; supply disruption from DenseLight Singapore operations.	Compound Semiconductor coverage of post-2019 DenseLight ownership (CompoundSemiconductor 2019 ✓) describes preferred-supply continuity.
IP5	Foreign-private-issuer disclosure asymmetry vs. US-domestic-issuer peers. As a foreign private issuer (Form 20-F annual, 6-K interim), POET’s quarterly disclosure cadence is structurally lighter than US-domestic-issuer peers (10-K + 10-Q + 8-K + Form 4). Insider-transaction visibility is meaningfully reduced.	2	1	FY26 20-F discloses related-party transactions or insider activity not previously visible; SEDAR Canadian disclosures conflict with US 6-K disclosures.	POET signaled US-redomicile track. Q4 2025 release is unusually transparent on production-volume commitment, suggesting management voluntary-disclosure shift.

X — Competitive risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
X1	Monolithic SiPh winning at 1.6T / 3.2T pluggable layer. GlobalFoundries Fotonix, Tower’s CPO foundry technology, Intel SiPh, TSMC SiPh — all advancing monolithic platforms toward production volume at the same product-cycle window POET is ramping.	3	3	Innolight, Eoptolink, Coherent module OEMs announce monolithic SiPh-based 1.6T/3.2T design wins that exclude POET-integrated platforms; OFC 2027 / ECOC 2027 disclosures favor monolithic architecture.	Hybrid-integration cost-structure advantage at the pluggable layer (bull case Pillar 1). Multi-architecture customer engagement reduces single-architecture lock-out risk.
X2	Coherent (NYSE: COHR) integrated optical engines compete directly. Coherent has both InP foundry capacity and merchant-component-layer products at the 800G/1.6T pluggable-engine level. Direct head-to-head competition for module-OEM design wins.	2	2	Coherent’s 800G/1.6T pluggable-engine ASPs decline aggressively; module OEMs disclose multi-source qualification with Coherent as alternate.	POET’s hybrid-integration cost structure should yield BOM advantage vs. Coherent’s vertically-integrated InP+SiPh approach; partnership stack accesses third-party InP capacity.
X3	NVIDIA / hyperscaler in-house silicon photonics CPO bypasses merchant pluggables. NVIDIA’s announced silicon photonics + CPO program targets vertically-integrated optical interconnect for Blackwell Ultra and Rubin platforms. If hyperscaler-customers vertically integrate, the merchant-pluggable-engine TAM compresses.	2	3	NVIDIA Q2-Q4 CY26 calls cite SiPh CPO production ramp; SC26 / GTC 2027 keynotes detail vertical-integration optical roadmap.	Hyperscaler in-house programs typically address their captive consumption only; merchant-component layer continues to serve non-NVIDIA accelerators (TPUs, MTIA, custom ASIC programs) and the broader datacenter network beyond AI rack.
X4	HyperLight + Lightwave Logic + Polariton/Marvell modulator-layer competition. TFLN (HyperLight), EO-polymer (Lightwave Logic), POH (Polariton/Marvell) — three competing modulator-layer platforms target the same 1.6T+ pluggable insertion that POET addresses through QCi TFLN collaboration.	2	2	Hyperscaler module-spec disclosures favor a specific modulator-IP layer; Polariton/Marvell announces hyperscaler design wins at 3.2T that exclude POET-integrated platforms.	POET’s Optical Interposer is modulator-architecture-agnostic; the QCi collaboration extends into TFLN. POH and EO-polymer are at the modulator-IP layer, not the integration-platform layer.
X5	Marvell + Celestial AI + Polariton end-to-end optical stack. Marvell’s $3.25B Celestial AI acquisition (closed Feb 2 2026) plus the April 22 2026 Polariton acquisition creates an end-to-end scale-up + scale-out optical stack (MRVL bull case Pillars 2-3 ✓). The competitive overhang is that Marvell’s end-to-end positioning is structurally deeper than POET’s integration-platform-only positioning.	2	2	Marvell’s optical revenue ramps materially > expectations; module OEM design wins shift from POET-integrated to Marvell-integrated platforms.	POET’s microcap focus + foundry-light model is structurally different from Marvell’s $130B-mkt-cap end-to-end approach. The competitive positioning is at different layers.

M — Market / Macro risks

ID	Risk	L	I	Detection trigger	Mitigation / management commentary
M1	AI capex deceleration (peak hyperscaler thesis). Hyperscaler capex is the demand engine for POET’s AI-pluggable transceiver roadmap. A 2026-2027 capex pause compresses module-OEM order books and the resulting POET production-order pipeline.	2	3	Hyperscaler Q3 / Q4 CY26 capex guidance trimmed; CY27 capex midpoints decline; module OEMs (Innolight, Eoptolink) order-book guidance softens.	POET’s volume targets (30,000+ engines 2026) are micro relative to hyperscaler capex; the demand-side margin is ample even at moderated AI capex growth.
M2	Microcap multiple compression. POET trades at a market cap entirely supported by option-value on commercial revenue ramp. Any broader microcap derisking (rate environment, risk-off rotation, AI-bubble narrative compression) drives multiple compression independent of POET-specific execution.	3	2	Russell 2000 / IWM underperforms broader market by > 10%; AI-photonics microcap peer set (LWLG, NLM, others) sees multiple compression.	Probability-weighted bull-case math (bull case Pillar 5) holds at any reasonable multiple if the revenue ramp delivers; the multiple-compression risk is timing-of-rerating, not endpoint valuation.
M3	Recession / IT-spend pullback compresses transceiver-module unit-volume demand. Slower hyperscaler + telco infrastructure spend reduces module-OEM order books and hence POET’s production-order conversion.	2	2	Module-OEM order book guidance soft; carrier capex cuts at telco operators; transceiver pricing compresses.	AI-driven demand has historically been more recession-resilient than traditional enterprise IT spend.
M4	Geopolitical escalation (Taiwan-China + Malaysia foundry exposure). SilTerra Malaysia is non-Taiwan but is in a region that benefits from Taiwan-China tension as a foundry-allocation hedge. A regional escalation that affects Malaysia-domiciled foundries would compress POET’s wafer-allocation security.	1	3	Regional escalation; SilTerra capacity contingency disclosures; transferring production to backup geography becomes urgent.	SilTerra’s geographic positioning (Malaysia) is one of the structural reasons POET chose it 2018. Backup foundry qualification path is feasible (Tower US/Israel, GF, etc.).
M5	Currency exposure (USD reporting, CAD shareholder base, Malaysian-Ringgit foundry costs). POET reports in USD but has CAD shareholder base + Malaysian-Ringgit foundry-related costs. Currency volatility creates earnings-translation noise.	2	1	FY26 20-F currency-translation footnotes show > 5% earnings impact; CAD/USD or MYR/USD volatility increases.	Standard FX-hedging practices are available; impact is likely de minimis at current revenue base.

Aggregated risk-scenario sensitivity

Scenario	Risks materializing simultaneously	Implied EV impact	$/share impact (vs. spot $8.03)
Single-tail bear	C1 (single-customer order cancellation)	-$50M EV / -45%	-$0.75 → ~$7.25
CPO architectural shift	T5 + X1 + X3 (CPO compresses pluggable TAM)	-$200M EV / -180% (negative implied EV)	-$3.00 → ~$5.00
Continued dilution	K1 + K2 (additional 2026/2027 raise + warrant exercises)	EV stable, share count +25%	-$2.00 → ~$6.00
Soft-bear combined	C1 + K1 + M2 (multiple compression)	-$150M EV / -135% + dilution	-$3.50 → ~$4.50
Hard-bear combined	T5 + C1 + K1 + X1 + IP1 + M1	-$300M EV (back to pre-cash levels) + dilution	-$5.00 → ~$3.00 (52w-low region)

The hard-bear scenario lands at $3-$4/share — roughly the 52-week low of $3.78 per STOCK_PRICE_DATA.json ✓. That asymmetric tail is the structural reason for active position-sizing rather than passive accumulation; even at the base-case bear math, the implied downside is meaningful.

The hard-bear scenario also clarifies the risk-asymmetry: with $580M starting-2026 cash on a ~$542M market cap, the equity has hard cash-floor protection that should keep the floor near $4-$5/share even in the most pessimistic execution scenarios — unless additional dilution raises drive the share count to 200M+ before any commercial revenue ramp materializes.